
Create, execute, and debug test plans for block-
level, subsystem-
level, and top-
level verification. ... Responsibilities: Verify complex digital designs at RTL
level according to architecture and design specifications ... Validate designs involving CHI protocol, cache structures, coherency mechanisms, and system-
level interactions ... simulation tools Knowledge of revision control methodology and tools (git, svn) Experience in block
level ... and sub-system or top
level verification Experience with formal and dynamic verification Strong problem-solving